TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 121

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

A read
-modify-write
operation
cannot be
performed
(0201H)
(0209H)
(0219H)
(0211H)
SC0CR
SC1CR
SC2CR
SC3CR
Bit symbol
Read/Write
After reset
Function
Note: All error flags are cleared to 0 when read. These bits should not be tested using a bit test instruction.
Bit 8 of a
received
character
Undefined
RB8
R
7
Parity type
1: Even
0: Odd
EVEN
Figure 3.10.10 Serial Control Register
6
0
R/W
Parity
0: Disable
1: Enable
PE
5
0
91CW40-119
Overrun
error
OERR
0
4
1: Error has occurred
R (Cleared when read)
Parity
error
PERR
0
3
error
Framing
Framing error flag
Parity error flag
Overrun error flag
0
1
0
1
Input clock in I/O interface mode
Active edge for the SCLKn input/output
Parity generation
Parity type
Bit 8 of a received character
FERR
0
1
0
1
2
0
Baud rate generator
SCLKn pin input
Transmit/receive data on the
SCLKn rising edge.
Transmit/receive data on the
SCLKn falling edge.
Disable
Enable
Odd parity
Even parity
0: SCLKn
1: SCLKn
SCLKS
1
0
R/W
1: SCLKn
0: Baud
rate
generator
pin input
TMP91CW40
IOC
0
0
2008-09-19
These bits are
cleared to 0
when read.