TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 65

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

3.5.8
Port 1 (P10 to P17)
programmed for input or output. Reset operation initializes all pins to input port pins. All
bits of the output latch register (P1) are set to 0. In addition to functioning as a
general-purpose input/output port, Port 1 can also function as LCD segment output pins.
This alternate function can be enabled by writing 1 to respective bits in the LCD output
control 2 register. Upon reset, the P1CR and LCDSW2 are all initialized to 0, setting all
pins as input port pins.
Port 1 is an 8-bit general-purpose input/output port. Each bit can be individually
LCDSW2 write
Direction control
Function control
P1CR write
Output latch
Reset
P1 write
(Bitwise)
(Bitwise)
P1 read
Figure 3.5.21 Port 1 (P10 to P17)
Selector
S
91CW40-63
B
A
<EDSP>
SEG16 to SEG23
TMP91CW40
2008-09-19
P10 to P17
(SEG16 to SEG23)