TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 120

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
3.10.3
SC0MOD0
SC1MOD0
SC2MOD0
SC3MOD0
(020AH)
(021AH)
(0202H)
(0212H)
SFRs
Bit symbol
Read/Write
After reset
Function
Bit 8 of a
transmitted
character
TB8
7
0
Handshake
control
1: Enable
0: Disable
Figure 3.10.9 Serial Mode Control Register 0
CTSE
CTS
CTS
6
0
Receive
0: Disable
1: Enable
control
RXE
5
0
91CW40-118
Wakeup
function
0: Disable
1: Enable
WU
0
4
R/W
Serial transfer mode
00: I/O interface mode
01: 7-bit UART mode
10: 8-bit UART mode
11: 9-bit UART mode
SM1
0
3
Serial clock (for UART)
Receive control
Handshake (
Serial transfer mode
Wakeup function
Bit 8 of a transmitted character
Note: In I/O interface mode, the serial
00 Setting prohibited
01 Baud rate generator
10 Internal clock f
11 External clock (SCLKn input)
00
01
10
11
0
1
0
1
SM0
0
1
2
0
Disable
Enable
Disable (Data streams
accepted at all times)
Enable
I/O interface mode
UART mode
control register (SCnCR) is used to
select the clock source.
9-bit UART mode
Interrupt on every
received character
Interrupt only when
SCnCR<RB8> = 1
Serial clock (for UART)
00: Setting prohibited
01: Baud rate
10: Internal clock f
11: External clock
(SCLKn input)
CTS
SC1
1
generator
0
pin)
SYS
7-bit
8-bit
9-bit
TMP91CW40
SC0
0
0
2008-09-19
SYS
Other modes
Don’t care

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