TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 7

no-image

TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
2.2
BOOT
DVO
MLDALM
P50 to P53
AN0 to AN3
KWI0 to KWI3
P60
INT0
P61
INT1
P62
ALARM
P70
ECNT1
P71
ECNT2
P72
ECNT3
P73
ECIN1
P74
ECIN2
P75
ECIN3
P80
TC5OUT
P81
TC6OUT
P82
TC7OUT
P83
TC8OUT
P90
TXD0
P91
RXD0
P92
SCLK0
CTS
ADTRG
Pin Name
0
Pin Names and Functions
TMP91CW40.
Table 2.2.1 to Table 2.2.2 list the names and functions of the input and output pins of the
Number
of Pins
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Table 2.2.1 Pin Names and Functions (1/2)
Port 5: Input port
Analog input: Input to the AD converter
AD trigger: External start request pin for the AD converter (multiplexed with P53)
Key-on wakeup input (multiplexed with P50 to P53)
Port 60: Input port
Interrupt request pin 0: Programmable as high-level, low-level, rising-edge or falling-edge sensitive
Port 61: Input/output port
Interrupt request pin 1: Programmable as high-level, low-level, rising-edge or falling-edge sensitive
Port 62: Input/output port
RTC alarm output pin
Boot mode control pin for flash memory (specifically designed for 91FW40; to be pulled up
during the reset period)
Port 70: Input/output port
16-bit timer 1 input: Count control input for 16-bit timer TC1
Port 71: Input/output port
16-bit timer 2 input: Count control input for 16-bit timer TC2
Port 72: Input/output port
16-bit timer 3 input: Count control input for 16-bit timer TC3
Divider output pin
Melody/Alarm output pin
Port 73: Input/output port
16-bit timer 1 input: Count input for 16-bit timer TC1
Port 74: Input/output port
16-bit timer 2 input: Count input for 16-bit timer TC2
Port 75: Input/output port
16-bit timer 3 input: Count input for 16-bit timer TC3
Port 80: Input/output port (large-current port )
8-bit timer 5 output: Output pin for 8-bit timer TC5
Open-drain output mode by programmable
Port 81: Input/output port (large-current port)
8-bit timer 6 output: Output pin for 8-bit timer TC6
Open-drain output mode by programmable
Port 82: Input/output port (large-current port)
8-bit timer 7 output: Output pin for 8-bit timer TC7
Open-drain output mode by programmable
Port 83: Input/output port (large-current port)
8-bit timer 8 output: Output pin for 8-bit timer TC8
Open-drain output mode by programmable
Port 90: Input/output port
Serial 0 transmit data
Open-drain output mode by programmable
Port 91: Input/output port
Serial 0 receive data
Port 92: Input/output port
Serial 0 clock input/output
Serial 0 data transmit enable (Clear to send)
Note:
In NORMAL mode, do not input Low level on this pin during the reset period. If Low
level is input, boot mode will be entered.
91CW40-5
Function
TMP91CW40
2008-09-19

Related parts for TMP91xy40FG