TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 25

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

Figure 3.3.5 Example Timings for Exiting a HALT Mode (IDLE2 Mode) with an Interrupt
Figure 3.3.6 Example Timings for Exiting a HALT Mode (IDLE1 Mode) with an Interrupt
(3) Operation in HALT modes
a.
b.
A0 to A23
Wakeup
interrupt
A0 to A23
IDLE2 mode
functions enabled with the IDLE2 setting bits in respective SFRs are operational.
IDLE1 mode
time-of-day clock timer are active. Interrupt requests are sampled asynchronously
with the system clock in a halt state, but the HALT mode is exited in synchronization
with the system clock.
Wakeup
interrupt
In IDLE2 mode, the CPU stops executing instructions and only the internal I/O
Figure 3.3.5 shows example timings for exiting IDLE2 mode with an interrupt.
In IDLE1 mode, the system clock stops while only the internal oscillator and
Figure 3.3.6 shows example timings for exiting IDLE1 mode with an interrupt.
RD
X1
RD
X1
Address
Address
91CW40-23
IDLE2
mode
IDLE1
mode
Address + 2
Address + 2
TMP91CW40
2008-09-19