TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 55

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
3.5.4
TC5OUT,TC6OUT
TC7OUT,TC8OUT
Port 8 (P80 to P83)
programmed for input or output. Reset operation initializes all pins to input port pins. All
bits in the output latch register (P8) are set to 1. In addition to functioning as a
general-purpose input/output port, Port 8 can also function as output pins for 8-bit timers.
This alternate function can be enabled by writing 1 to respective bits of the Port 8 function
register (P8FC). Upon reset, the P8CR and P8FC registers are all initialized to 0, setting all
pins as input port pins.
Port 8 is a 4-bit general-purpose input/output port. Each bit can be individually
Function control
Direction control
P8CR write
P8FC write
Output latch
Reset
P8 write
(Bitwise)
(Bitwise)
P8 read
S
Figure 3.5.9 Port 8 (P80 to P83)
A
Selector
B
Selector
S
S
91CW40-53
B
A
ODE<ODE80:83>
open-drain output
Configurable as
P80 (TC5OUT)
P81 (TC6OUT)
P82 (TC7OUT)
P83 (TC8OUT)
TMP91CW40
2008-09-19

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