TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 110

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
RXD3
(Shared with
PA4)
SCLK3 output
(Shared with
PA5)
SCLK3 input
(Shared with
PA5)
f
φ T0
SYS
SC3MOD0
<RXE>
φ T0
φ T2
φ T8
φ T32
RXDCLK
I/O interface mode
RB8
<BR1CK1:0>
Receive buffer 1 (Shift register)
Serial clock generator
BR1CR
2
Receive buffer 2 (SC3BUF)
Internal data bus
φ T2
Receive counter
(÷ 16 for UART)
Receive control
Prescaler
4
<BR3S3:0>
BR3CR
8
Baud Rate
Generator
φ T8 φ T32
16 32 64
<BR3ADDE>
BR3CR
Figure 3.10.5 SIO3 Block Diagram
SC3MOD0
<WU>
<OERR><PERR><FERR>
<BR3K3:0>
BR3ADD
<PE>
Parity control
91CW40-108
SC3CR
÷ 2
Error flag
SC3CR
Serial channel
<EVEN>
interrupt
control
SC3MOD0
<SC1:0>
Internal data bus
SC3CR
<IOC>
I/O interface mode
UART
mode
TXDCLK
SC3MOD0
<SM1:0>
TB8
Transmit buffer (SC3BUF)
Internal data bus
Transmit counter
Transmit control
(÷ 16 for UART)
SIOCLK
SC3MOD0
<CTSE>
TMP91CW40
2008-09-19
Interrupt request
INTRX3
INTTX3
TXD1
(Shared with
PA3)
(Shared with
PA5)
CTS
3

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