TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 21
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMP91xy40FG
Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY40FG.pdf
(213 pages)
Specifications of TMP91xy40FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
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(4) Preventing software or system lockups using a protection register
Write other than 1FH to EMCCR1
Purpose:
system recovery routine from becoming unfetchable, for example, if the system clock
stops or a memory control register (CS/WAIT controller) is modified.
Applicable SFRs
Block diagram:
Description:
preventing specified SFRs from being written.
be determined by reading the <PROTECT> bit of the EMCCR0.
To prevent software or system lockups that may occur due to incoming noise.
Applying protection causes specified SFRs to be write-protected, thus preventing the
Writing any code other than 1FH to the EMCCR1 register enables protection,
Writing 1FH to the EMCCR1 register cancels protection. The state of protection can
A system reset cancels protection.
Write 1FH to EMCCR1
1. Clock gear (Only EMCCR1 can be written.)
SYSCR0, SYSCR1, SYSCR2, SYSCR3,
EMCCR0
Protection flag
SFR write signal
EMCCR0<PROTECT>
S
R
91CW40-19
Q
Write signal to other SFRs
Write signal to specified SFRs
TMP91CW40
2008-09-19
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