TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 157

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
(2) Writing clock data
correctly. Please use the following method to ensure data is written correctly.
1. Using 1Hz interrupt
2. Resets counter
When a carry over occurs during a write operation, the data cannot be written
can write correctly if writing data after 1Hz interrupt occurred.
32.768 KHz. The data is written after reset this counter.
setting time, first writing only. Therefore, if setting the clock counter correctly,
after clearing the counter, set the 1Hz-interrupt to enable. And set the time after
the first interrupt (occurs at 0.5Hz) is occurred.
1Hz interrupt and the count up of internal data synchronize. Therefore, data
There are 15-stage counter inside the RTC, which generate a 1Hz clock from
However, if clearing the counter, it is counted up only first writing at half of the
91CW40-155
RESTR<RSTTMR> = “1”
RESTR<DIS1HZ> = “0”
PAGER<PAGE> = “0” ,
First interrupts occur
enable 1Hz interrupt
Select PAGE0
(After 0.5 sec)
Sets the time
reset counter
Start
END
YES
NO
TMP91CW40
2008-09-19

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