TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 63

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

3.5.7
Port 2 (P20 to P27)
programmed for input or output. Reset operation initializes all pins as input port pins. All
bits of the output latch register (P2) are set to 1. In addition to functioning as a
general-purpose input/output port, Port 2 can also function as LCD segment output pins.
This alternate function can be enabled by writing 1 to respective bits of the LCD output
control 1 register (LCDSW1). Upon reset, the P2CR and LCDSW1 registers are all
initialized to 0, setting all pins as input port pins.
Port 2 is an 8-bit general-purpose input/output port. Each bit can be individually
Function control
Direction control
P2CR write
LCDSW1 write
Output latch
Reset
P2 write
(Bitwise)
(Bitwise)
P2 read
Figure 3.5.19 Port 2 (P20 to P27)
Selector
S
91CW40-61
B
A
<EDSP>
SEG8 to SEG15
TMP91CW40
2008-09-19
P20 to P27
(SEG8 to SEG15)