TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 171

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

ROMCMP30
(0418H)
ROMCMP31
(0419H)
ROMCMP32
(041AH)
ROMSUB3H
(041DH)
ROMSUB3L
(041CH)
Note 1: The ROMCMP30/31/32 and ROMSUB3L/H registers do not support read-modify-write operation.
Note 2: The ROMCMP30/31/32 and ROMSUB3L/H is read as undefined.
Note 3: Write 0 to bit 0 of the ROMCMP30.
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Figure 3.14.5 Program Patch Logic Registers (Bank3)
ROMS07
ROMS15
ROMC07
ROMC15
ROMC23
7
7
0
0
7
7
7
0
0
0
ROMS06
ROMS14
ROMC06
ROMC14
ROMC22
6
0
6
0
6
6
6
0
0
0
Bank3 Data substitution Register H
Bank3 Data substitution Register L
91CW40-169
Bank3 Address Compare Register 0
Bank3 Address Compare Register 1
Bank3 Address Compare Register 2
Target ROM address (Lower 7 bits)
ROMS05
ROMS13
ROMC05
ROMC13
ROMC21
5
5
0
0
5
5
5
0
0
0
Target ROM address (Middle 8 bits)
Target ROM address (Upper 8 bits)
Patch code (Lower 8 bits)
Patch code (Upper 8 bits)
ROMS04
ROMS12
ROMC04
ROMC12
ROMC20
4
4
W
0
0
4
4
4
0
0
0
W
W
W
W
ROMS03
ROMS11
ROMC03
ROMC11
ROMC19
3
3
0
0
3
3
3
0
0
0
ROMS02
ROMS10
ROMC02
ROMC10
ROMC18
2
2
0
0
2
2
2
0
0
0
ROMS01
ROMS09
ROMC09
ROMC17
ROMC01
1
1
0
0
1
1
1
0
0
0
TMP91CW40
2008-09-19
ROMS00
ROMS08
ROMC08
ROMC16
Write 0.
0
0
－
W
－
0
0
0
0
0
0
0