TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 135

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
LCDCR2
(03DEH)
Note 1: Do not set the <MSEG07> bit to 1 when the LCDCR<EDSP> bit is 1.
Note 2: Except for bit 5, all the bits of this register must always be written as 0.
Note 3: This register does not support read-modify-write operation.
MSEG07
“0”
7
“0”
6
SEG0 to SEG7 pins
output control
MSEG07
5
Figure 3.11.3 LCD Driver Control Register (2)
“0”
4
“0”
3
91CW40-133
0
1
“0”
2
LCDCR<EDSP>=0
High impedance
Low output
“0”
1
“0”
0
(Initial value: 0000 0000)
LCDCR<EDSP>=1
Display data output
Don’t use
TMP91CW40
2008-09-19
W

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