mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 210

no-image

mcf5282

Manufacturer Part Number
mcf5282
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5282
Manufacturer:
MOTOLOLA
Quantity:
648
Part Number:
mcf5282CVF66
Manufacturer:
FREESCAL
Quantity:
600
Part Number:
mcf5282CVF66
Manufacturer:
FREESCALE
Quantity:
2
Part Number:
mcf5282CVF66
Manufacturer:
FREESCAL
Quantity:
152
Part Number:
mcf5282CVF66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVF66
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mcf5282CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVF80
Manufacturer:
FREESCALE
Quantity:
12 388
Part Number:
mcf5282CVF80
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVM66
Manufacturer:
FREESCALE
Quantity:
1 002
Part Number:
mcf5282CVM66
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
mcf5282CVM80
Quantity:
4
Edge Port Module (EPORT)
In wait and doze modes, the EPORT module continues to operate as it does in run mode. It may be
configured to exit the low-power modes by generating an interrupt request on either a selected edge or a
low level on an external pin. In stop mode, there are no clocks available to perform the edge-detect
function. Only the level-detect logic is active (if configured) to allow any low level on the external
interrupt pin to generate an interrupt (if enabled) to exit stop mode.
11.3
All pins default to general-purpose input pins at reset. The pin value is synchronized to the rising edge of
CLKOUT when read from the EPORT pin data register (EPPDR). The values used in the edge/level detect
logic are also synchronized to the rising edge of CLKOUT. These pins use Schmitt triggered input buffers
which have built in hysteresis designed to decrease the probability of generating false edge-triggered
interrupts for slow rising and falling input signals.
When a pin is configured as an output, it is driven to a state whose level is determined by the corresponding
bit in the EPORT data register (EPDR). All bits in the EPDR are high at reset.
11-2
Low-power Mode
Interrupt/General-Purpose I/O Pin Descriptions
Doze
Wait
Stop
The input pin synchronizer is bypassed for the level-detect logic since no
clocks are available.
Table 11-1. Edge Port Module Operation in Low-power Modes
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
EPORT Operation
Level-sensing Only
Normal
Normal
NOTE
Any IRQx Interrupt at or above level in LPICR
Any IRQx Interrupt at or above level in LPICR
Any IRQx Interrupt set for level-sensing at or
above level in LPICR
Mode Exit
Freescale Semiconductor

Related parts for mcf5282