mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 507

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mcf5282

Manufacturer Part Number
mcf5282
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Refer to
the pins (primary function, GPIO, etc.) is determined by the various ports registers and the mode of
operation. Refer to
26.3
26.3.1
Table 26-2
Freescale Semiconductor
1
2
3
0x10_0000
0x10_0004
IPSBAR +
(Pin Name)
Offset
The primary functionality of a pin is not necessarily the default function of the pin after reset. Pins that have muxed GPIO
functionality will default to GPIO inputs.
Function available in master mode only
Pins not actually part of Port Module, but included here for complete listing of available I/O ports. See separate section for
description of this port.
ERXD[3:1]
Function
ETXD[3:1]
Primary
PEL[7:5]
PEL[3:1]
ERXER
ETXER
EMDIO
PAS[4]
EMDC
PEL[0]
PEL[4]
PAS[5]
ECRS
Chapter 14, “Signal
Memory Map/Register Definition
Register Overview
summarizes all the registers in the ports address space.
1
Function)
(Default
PEL[7:5]
PEL[3:1]
UTXD[2]
URXD2
PORTE
PORTA
PEH[0]
PEL[0]
PEL[4]
PAS[5]
PAS[4]
GPIO
31–24
Table 14-1
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
The following signals apply to MCF5214 and MCF5216 only
Function 1
Alternate
Descriptions” for more detailed descriptions of these pins. The function of
URXD2
UTXD2
Table 26-1. Ports External Signals (continued)
for detailed descriptions of pin functions.
Table 26-2. Ports Module Memory Map
Function 2
PORTB
PORTF
23–16
Alternate
Port Output Data Registers
Ethernet carrier receive sense / PEH[0]
Ethernet transmit data / Port EL[7:5]
Ethernet transmit error / Port EL[4]
Ethernet receive data [3:1] / Port EL[3:1]
Ethernet receive error / Port EL[0]
Ethernet management data control / Port AS[5] / URXD2
Ethernet management data clock / Port AS[4] / UTXD2
Port EL[0]
Port AS[4] / UTXD2
Port EL[7:5]
Port EL[4]
Port EL[3:1]
Port AS[5] / URXD2
PORTC
PORTG
15–8
Description
General Purpose I/O Module
PORTD
PORTH
7–0
Access
S/U
S/U
26-7
1

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