mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 70

• Manufacturer Part Number: mcf5282
• Manufacturer: Freescale Semiconductor, Inc

ColdFire Core
Information loaded into D1 defines the local memory hardware configuration as shown in the figure below.
2-24
DEBUG
Field
11–8
7–4
3–0
ISA
31–30
29–28
CCAS
Reset
Reset
CLSZ
BDM: Load: 0x1 (D1)
Field
W
W
R
R
Reserved.
ISA revision. Defines the instruction-set architecture (ISA) revision level implemented in ColdFire processor core.
0000 ISA_A
0001 ISA_B
0010 ISA_C
1000 ISA_A+ (This is the value used for this device.)
Else Reserved
Debug module revision number. Defines revision level of the debug module used in the ColdFire processor core.
0000 DEBUG_A
0001 DEBUG_B
0010 DEBUG_C
0011 DEBUG_D
0100 DEBUG_E
1001 DEBUG_B+
1011 DEBUG_D+
1111 DEBUG_D+PST Buffer
Else Reserved
Store: 0x1 (D1)
31
15
0
0
MBSZ
Cache line size. This field is fixed to a hex value of 0x0 indicating a 16-byte cache line size.
Configurable cache associativity.
00
01
Else Reserved for future use
CLSZ
30
14
0
0
Four-way
Direct mapped (This is the value used for this device)
Table 2-9. D0 Hardware Configuration Info Field Description (continued)
Table 2-10. D1 Hardware Configuration Information Field Description
29
13
0
0
CCAS
UCAS
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
28
12
1
1
Figure 2-19. D1 Hardware Configuration Info
27
11
0
0
0
26
10
0
0
0
CCSZ
25
1
0
0
9
Description
24
1
0
0
Description
8
23
1
1
7
22
0
0
6
FLASHSZ
SRAMSZ
21
1
5
0
20
1
0
4
19
0
0
3
Freescale Semiconductor
Access: User read-only
18
0
0
0
0
2
BDM read-only
17
0
0
0
0
1
16
0
0
0
0
0