mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 326

• Manufacturer Part Number: mcf5282
• Manufacturer: Freescale Semiconductor, Inc

Fast Ethernet Controller (FEC)
The MIBC is a read/write register controlling and observing the state of the MIB block. User software
accesses this register if there is a need to disable the MIB block operation. For example, to clear all MIB
counters in RAM:
The MIB_DIS bit is reset to 1. See
17.4.10 Receive Control Register (RCR)
RCR controls the operational mode of the receive block and must be written only when ECR[ETHER_EN]
is cleared (initialization time).
17-16
MIB_IDLE
17.4.9
MIB_DIS
Field
29–0
31
30
1. Disable the MIB block
2. Clear all the MIB RAM locations
3. Enable the MIB block
IPSBAR
Offset:
Reset
W
R
A read/write control bit. If set, the MIB logic halts and not update any MIB counters.
A read-only status bit. If set the MIB block is not currently updating any MIB counters.
Reserved.
0x1064
MIB_
DIS
MIB Control Register (MIBC)
31
1
MIB_
IDLE
30
1
Internal FEC Clock
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Frequency
Table 17-12. Programming Examples for MSCR (continued)
50 MHz
66 MHz
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 17-9. MIB Control Register (MIBC)
Table 17-13. MIBC Field Descriptions
Table 17-4
MSCR[MII_SPEED]
for the locations of the MIB counters.
0xA
0xE
Description
FEC_MDC frequency
2.50 MHz
2.36 MHz
8
7
Access: User read/write
Freescale Semiconductor
6
5
4
3
2
1
0