mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 47

• Manufacturer Part Number: mcf5282
• Manufacturer: Freescale Semiconductor, Inc

Chapter 2
ColdFire Core
2.1
This section describes the organization of the Version 2 (V2) ColdFire
of the program-visible registers. For detailed information on instructions, see the ISA_A+ definition in the
ColdFire Family Programmer’s Reference Manual.
2.1.1
As with all ColdFire cores, the V2 ColdFire core is comprised of two separate pipelines decoupled by an
instruction buffer.
The instruction fetch pipeline (IFP) is a two-stage pipeline for prefetching instructions. The prefetched
instruction stream is then gated into the two-stage operand execution pipeline (OEP), which decodes the
Freescale Semiconductor
Introduction
Overview
Instruction
Execution
Operand
Pipeline
Pipeline
Fetch
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
DSOC
AGEX
IAG
IC
IB
Decode & Select,
Figure 2-1. V2 ColdFire Core Pipelines
Instruction Buffer
Operand Fetch
Generation,
Fetch Cycle
Instruction
Generation
Instruction
Address
Address
Execute
FIFO
®
processor core and an overview
Address [
Read Data[31:0]
Write Data[31:0]
31
:0]
2-1