mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 498

• Manufacturer Part Number: mcf5282
• Manufacturer: Freescale Semiconductor, Inc

FlexCAN
The interrupt mask register contains two 8-bit fields: bits 15-8 (IMASK_H) and bits 7-0 (IMASK_L). The
register can be accessed by the master as a 16-bit register, or each byte can be accessed individually using
an 8-bit (byte) access cycle.
Table 25-18
25.5.10 Interrupt Flag Register (IFLAG)
IFLAG contains one interrupt flag bit per buffer. Each successful transmission/reception sets the
corresponding IFLAG bit and, if the corresponding IMASK bit is set, will generate an interrupt.
This register contains two 8-bit fields: bits 15-8 (IFLAG_H) and bits 7-0 (IFLAG_L). The register can be
accessed by the master as a 16-bit register, or each byte can be accessed individually using an 8-bit (byte)
access cycle.
25-28
15–0
Bits
Address
Reset
Reset
Field
Field
R/W
R/W
Name
BUFn
describes the IMASK fields.
M
BUF15M
BUF7M
IMASK contains one interrupt mask bit per buffer. It allows the CPU to designate which buffers will
generate interrupts after successful transmission/reception.
0 The interrupt for the corresponding buffer is disabled.
1 The interrupt for the corresponding buffer is enabled.
15
7
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
BUF14M
BUF6M
Figure 25-14. Interrupt Mask Register (IMASK)
14
6
Table 25-18. IMASK Field Descriptions
BUF13M
BUF5M
13
5
IPSBAR + 0x1C_0022
BUF4M
BUF12
12
4
0000_0000
0000_0000
Description
R/W
R/W
BUF11M
BUF3M
11
3
BUF10M
BUF2M
10
BUF9M
BUF1M
Freescale Semiconductor
9
BUF8M
BUF0M
8
0