mcf5282 Freescale Semiconductor, Inc, mcf5282 Datasheet - Page 346

no-image

mcf5282

Manufacturer Part Number
mcf5282
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5282
Manufacturer:
MOTOLOLA
Quantity:
648
Part Number:
mcf5282CVF66
Manufacturer:
FREESCAL
Quantity:
600
Part Number:
mcf5282CVF66
Manufacturer:
FREESCALE
Quantity:
2
Part Number:
mcf5282CVF66
Manufacturer:
FREESCAL
Quantity:
152
Part Number:
mcf5282CVF66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVF66
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mcf5282CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVF80
Manufacturer:
FREESCALE
Quantity:
12 388
Part Number:
mcf5282CVF80
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5282CVM66
Manufacturer:
FREESCALE
Quantity:
1 002
Part Number:
mcf5282CVM66
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
mcf5282CVM80
Quantity:
4
Fast Ethernet Controller (FEC)
group address is determined by the I/G bit in the destination address field. A flowchart for address
recognition on received frames appears in the figures below.
Address recognition is accomplished through the use of the receive block and microcode running on the
microcontroller. The flowchart shown in
Figure 17-27
illustrates the address recognition decisions made
by the receive block, while
Figure 17-28
illustrates the decisions made by the microcontroller.
If the DA is a broadcast address and broadcast reject (RCR[BC_REJ]) is cleared, then the frame is
accepted unconditionally, as shown in
Figure
17-27. Otherwise, if the DA is not a broadcast address, then
the microcontroller runs the address recognition subroutine, as shown in
Figure
17-28.
If the DA is a group (multicast) address and flow control is disabled, then the microcontroller performs a
group hash table lookup using the 64-entry hash table programmed in GAUR and GALR. If a hash match
occurs, the receiver accepts the frame.
If flow control is enabled, the microcontroller does an exact address match check between the DA and the
designated PAUSE DA (01:80:C2:00:00:01). If the receive block determines the received frame is a valid
PAUSE frame, the frame is rejected. The receiver detects a PAUSE frame with the DA field set to the
designated PAUSE DA or the unicast physical address.
If the DA is the individual (unicast) address, the microcontroller performs an individual exact match
comparison between the DA and 48-bit physical address that you program in the PALR and PAUR
registers. If an exact match occurs, the frame is accepted; otherwise, the microcontroller does an individual
hash table lookup using the 64-entry hash table programmed in registers, IAUR and IALR. In the case of
an individual hash match, the frame is accepted. Again, the receiver accepts or rejects the frame based on
PAUSE frame detection, shown in
Figure
17-27.
If neither a hash match (group or individual) nor an exact match (group or individual) occur, and if
promiscuous mode is enabled (RCR[PROM] set), the frame is accepted and the MISS bit in the receive
buffer descriptor is set; otherwise, the frame is rejected.
Similarly, if the DA is a broadcast address, broadcast reject (RCR[BC_REJ]) is asserted, and promiscuous
mode is enabled, the frame is accepted and the MISS bit in the receive buffer descriptor is set; otherwise,
the frame is rejected.
In general, when a frame is rejected, it is flushed from the FIFO.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
17-36
Freescale Semiconductor

Related parts for mcf5282