AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 10

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

I/O Lines Considerations
JTAG Port Pins
Test Pin
Reset Pin
ERASE Pin
PIO Controller Lines
I/O Line Drive Levels
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AT91SAM7S32 Preliminary
TMS, TDI and TCK are schmitt trigger inputs. TMS and TCK are 5-V tolerant, TDI is not.
TMS, TDI and TCK do not integrate a pull-up resistor.
TDO is an output, driven at up to VDDIO, and has no pull resistor.
The pin JTAGSEL is used to select the JTAG boundary scan when asserted at a high
level. The pin JTAGSEL integrates a permanent pull-down resistor of about 15 kW to
GND, so that it can be left unconnected for normal operations.
The pin TST is used for manufacturing test or fast programming mode of the
AT91SAM7S32 when asserted high. The pin TST integrates a permanent pull-down
resistor of about 15 kW to GND, so that it can be left unconnected for normal operations.
To enter fast programming mode, the pin TST and the pin PA0 and PA1 should be both
tied high.
Driving the pin TST at a high level while PA0 or PA1 is driven at 0 leads to unpredictable
results.
The pin NRST is bi-directional. It is handled by the on-chip reset controller and can be
driven low to provide a reset signal to the external components or asserted low exter-
nally to reset the microcontroller. There is no constraint on the length of the reset pulse,
and the reset controller can guarantee a minimum pulse length. This allows connection
of a simple push-button on the pin NRST as system user reset, and the use of the signal
NRST to reset all the components of the system.
The pin NRST integrates a permanent pull-up resistor to VDDIO.
The pin ERASE is used to re-initialize the Flash content and some of its NVM bits. It
integrates a permanent pull-down resistor of about 15 kW to GND, so that it can be left
unconnected for normal operations.
All the I/O lines PA0 to PA20 are 5V-tolerant and all integrate a programmable pull-up
resistor. Programming of this pull-up resistor is performed independently for each I/O
line through the PIO controllers.
5V-tolerant means that the I/O lines can drive voltage level according to VDDIO, but can
be driven with a voltage of up to 5.5V. However, driving an I/O line with a voltage over
VDDIO while the programmable pull-up resistor is enabled can lead to unpredictable
results. Care should be taken, in particular at reset, as all the I/O lines default in input
with pull-up resistor enabled at reset.
The PIO lines PA0 to PA3 are high-drive current capable. Each of these I/O lines can
drive up to 16 mA permanently.
The remaining I/O lines can draw only 8 mA.
However, the total current drawn by all the I/O lines cannot exceed 100 mA.
6071A–ATARM–28-Oct-04