AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 148
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
- Current page: 148 of 446
- Download datasheet (3Mb)
AIC End of Interrupt Command Register
Register Name: AIC_EOICR
Access Type:
The End of Interrupt Command Register is used by the interrupt routine to indicate that the interrupt treatment is complete.
Any value can be written because it is only necessary to make a write to this register location to signal the end of interrupt
treatment.
AIC Spurious Interrupt Vector Register
Register Name: AIC_SPU
Access Type:
Reset Value:
• SIQV: Spurious Interrupt Vector Register
The user may store the address of a spurious interrupt handler in this register. The written value is returned in AIC_IVR in
case of a spurious interrupt and in AIC_FVR in case of a spurious fast interrupt.
148
31
23
15
31
23
15
–
–
–
7
–
7
AT91SAM7S32 Preliminary
Write-only
Read/Write
0
30
22
14
30
22
14
–
–
–
6
–
6
29
21
13
29
21
13
–
–
–
5
–
5
28
20
12
28
20
12
–
–
–
4
–
4
SIQV
SIQV
SIQV
SIQV
27
19
11
27
19
11
–
–
–
3
–
3
26
18
10
26
18
10
–
–
–
2
–
2
25
17
25
17
–
–
–
1
–
1
9
9
6071A–ATARM–28-Oct-04
24
16
24
16
–
–
8
–
0
–
8
0
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