AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 393

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Figure 170. GOVRE and OVREx Flag Behavior
Conversion
Triggers
6071A–ATARM–28-Oct-04
(ADC_CHSR)
(ADC_CHSR)
ADC_LCDR
ADC_CDR0
ADC_CDR1
(ADC_SR)
(ADC_SR)
(ADC_SR)
(ADC_SR)
(ADC_SR)
GOVRE
ADTRG
DRDY
OVRE0
EOC0
EOC1
CH0
CH1
Undefined Data
Undefined Data
If the ADC_CDR is not read before further incoming data is converted, the corresponding
Overrun Error (OVRE) flag is set in the Status Register (ADC_SR).
In the same way, new data converted when DRDY is high sets the bit GOVRE (General Over-
run Error) in ADC_SR.
The OVRE and GOVRE flags are automatically cleared when ADC_SR is read.
Warning: If the corresponding channel is disabled during a conversion or if it is disabled and
then reenabled during a conversion, its associated data and its corresponding EOC and OVRE
flags in ADC_SR are unpredictable.
Conversions of the active analog channels are started with a software or a hardware trigger.
The software trigger is provided by writing the Control Register (ADC_CR) with the bit START
at 1.
The hardware trigger can be one of the TIOA outputs of the Timer Counter channels, or the
external trigger input of the ADC (ADTRG). The hardware trigger is selected with the field
TRGSEL in the Mode Register (ADC_MR). The selected hardware trigger is enabled with the
bit TRGEN in the Mode Register (ADC_MR).
Conversion
Undefined Data
Conversion
Data A
Data A
Data B
AT91SAM7S32 Preliminary
Conversion
Data B
Data C
Read ADC_CDR1
Data C
Read ADC_SR
Read ADC_CDR0
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