AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 119

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Data Transfers
Priority of PDC
Transfer Requests
6071A–ATARM–28-Oct-04
the values of the Next Counter/Pointer are loaded into the Counter/Pointer registers in order to
re-enable the triggers.
For each channel, two status bits indicate the end of the current buffer (ENDRX, ENTX) and
the end of both current and next buffer (RXBUFF, TXBUFE). These bits are directly mapped to
the peripheral status register and can trigger an interrupt request to the AIC.
The peripheral end flag is automatically cleared when one of the counter-registers (Counter or
Next Counter Register) is written.
Note: When the Next Counter Register is loaded into the Counter Register, it is set to zero.
The peripheral triggers PDC transfers using transmit (TXRDY) and receive (RXRDY) signals.
When the peripheral receives an external character, it sends a Receive Ready signal to the
PDC which then requests access to the system bus. When access is granted, the PDC starts
a read of the peripheral Receive Holding Register (RHR) and then triggers a write in the
memory.
After each transfer, the relevant PDC memory pointer is incremented and the number of trans-
fers left is decremented. When the memory block size is reached, a signal is sent to the
peripheral and the transfer stops.
The same procedure is followed, in reverse, for transmit transfers.
The Peripheral Data Controller handles transfer requests from the channel according to priori-
ties fixed for each product.These priorities are defined in the product datasheet.
If simultaneous requests of the same type (receiver or transmitter) occur on identical peripher-
als, the priority is determined by the numbering of the peripherals.
If transfer requests are not simultaneous, they are treated in the order they occurred.
Requests from the receivers are handled first and then followed by transmitter requests.
AT91SAM7S32 Preliminary
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