AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 386

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AT91SAM7S32-AI

Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
PWM Channel Period Register
Register Name: PWM_CPRDx
Access Type:
Only the first 16 bits (internal channel counter size) are significative.
• CPRD: Channel Period
If the waveform is left-aligned, then the output waveform period depends on the counter source clock and can be
calculated:
If the waveform is center-aligned, then the output waveform period depends on the counter source clockand can be
calculated:
386
31
23
15
7
By using the Master Clock (MCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 128,
256, 512, or 1024). The resulting period formula will be:
By using a Master Clock divided by one of both DIVA or DIVB divider, the formula becomes, respectively:
By using the Master Clock (MCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 128,
256, 512, or 1024). The resulting period formula will be:
By using a Master Clock divided by one of both DIVA or DIVB divider, the formula becomes, respectively:
------------------------------ -
----------------------------------------- -
---------------------------------------- -
--------------------------------------------------- -
X
CRPD
2
2
AT91SAM7S32 Preliminary
MCK
X
CPRD
CPRD
MCK
MCK
MCK
CPRD
DIVA
Read/Write
DIVA
30
22
14
6
or
--------------------------------------------- -
or
CRPD
--------------------------------------------------- -
2
MCK
CPRD
DIVAB
MCK
29
21
13
5
DIVB
28
20
12
4
CPRD
CPRD
CPRD
CPRD
27
19
11
3
26
18
10
2
25
17
9
1
6071A–ATARM–28-Oct-04
24
16
8
0

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