AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 325

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

SSC Control Register
Name:
Access Type:
• RXEN: Receive Enable
0: No effect.
1: Enables Data Receive if RXDIS is not set
• RXDIS: Receive Disable
0: No effect.
1: Disables Data Receive
• TXEN: Transmit Enable
0: No effect.
1: Enables Data Transmit if TXDIS is not set
• TXDIS: Transmit Disable
0: No effect.
1: Disables Data Transmit
• SWRST: Software Reset
0: No effect.
1: Performs a software reset. Has priority on any other bit in SSC_CR.
Note:
SSC Clock Mode Register
Name:
Access Type:
• DIV: Clock Divider
0: The Clock Divider is not active.
Any Other Value: The Divided Clock equals the Master Clock divided by 2 times DIV. The maximum bit rate is MCK/2. The
minimum bit rate is MCK/2 x 4095 = MCK/8190.
6071A–ATARM–28-Oct-04
SWRST
31
23
15
31
23
15
–
–
7
–
–
–
–
7
1. Only the data management is affected
SSC_CR
Write-only
SSC_CMR
Read/Write
30
22
14
30
22
14
–
–
–
6
–
–
–
–
6
(1)
(1)
.
.
29
21
13
29
21
13
–
–
–
5
–
–
–
–
5
(1)
(1)
.
.
28
20
12
28
20
12
–
–
–
4
–
–
–
–
4
DIV
27
19
27
19
11
11
AT91SAM7S32 Preliminary
–
–
–
3
–
–
–
3
26
18
10
26
18
10
–
–
–
2
–
–
–
2
DIV
RXDIS
TXDIS
25
17
25
17
–
–
9
1
–
–
9
1
RXEN
TXEN
24
16
24
16
–
–
8
0
–
–
8
0
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