AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 255
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AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
- Current page: 255 of 446
- Download datasheet (3Mb)
6071A–ATARM–28-Oct-04
Figure 99. TWI Read in Master Mode
Yes
Set the Master Mode register:
Internal address size = 0?
Read ==> bit MREAD = 0
Set the control register:
- Device slave address
- Internal address size
- Transfer direction bit
TWI_CWGR = clock
Read status register
Read status register
TWI_CR = START
TWI_CR = MSEN
TWI_CR = STOP
Start the transfer
Stop the transfer
- Master enable
- Slave disable
Set TWI clock:
TXCOMP = 0?
Data to read?
RXRDY = 0?
Yes
START
END
AT91SAM7S32 Preliminary
Yes
Yes
Set the internal address
TWI_IADR = address
255
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