AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 54

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Reset Controller Mode Register
Register Name: RSTC_MR
Access Type:
• URSTEN: User Reset Enable
0 = The detection of a low level on the pin NRST does not generate a User Reset.
1 = The detection of a low level on the pin NRST triggers a User Reset.
• URSTIEN: User Reset Interrupt Enable
0 = USRTS bit in RSTC_SR at 1 has no effect on rstc_irq.
1 = USRTS bit in RSTC_SR at 1 asserts rstc_irq if URSTEN = 0.
• BODIEN: Brownout Detection Interrupt Enable
0 = BODSTS bit in RSTC_SR at 1 has no effect on rstc_irq.
1 = BODSTS bit in RSTC_SR at 1 asserts rstc_irq.
• ERSTL: External Reset Length
This field defines the external reset length. The external reset is asserted during a time of 2
allows assertion duration to be programmed between 60 µs and 2 seconds.
• KEY: Password
Should be written at value 0xA5. Writing any other value in this field aborts the write operation.
54
31
23
15
–
–
7
–
AT91SAM7S32 Preliminary
Read/Write
30
22
14
–
–
6
–
29
21
13
–
–
5
–
URSTIEN
28
20
12
–
–
4
KEY
27
19
11
–
3
–
26
18
10
–
2
–
ERSTL
(ERSTL+1)
25
17
–
9
1
–
Slow Clock cycles. This
6071A–ATARM–28-Oct-04
URSTEN
BODIEN
24
16
8
0