AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 47

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Software Reset
Figure 19. Software Reset
6071A–ATARM–28-Oct-04
SRCMP in RSTC_SR
Write RSTC_CR
if PROCRST=1
periph_nreset
if PERRST=1
if EXTRST=1
The Reset Controller offers several commands used to assert the different reset signals.
These commands are performed by writing the Control Register (RSTC_CR) with the following
bits at 1:
•
•
•
The software reset is entered if at least one of these bits is set by the software. All these com-
mands can be performed independently or simultaneously. The software reset lasts 3 Slow
Clock cycles.
The internal reset signals are asserted as soon as the register write is performed. This is
detected on the Master Clock (MCK). They are released when the software reset is left, i.e.;
synchronously to SLCK.
If EXTRST is set, the nrst_out signal is asserted depending on the programming of the field
ERSTL. However, the resulting falling edge on NRST does not lead to a User Reset.
If and only if the PROCRST bit is set, the Reset Controller reports the software status in the
field RSTTYP of the Status Register (RSTC_SR). Other Software Resets are not reported in
RSTTYP.
As soon as a software operation is detected, the bit SRCMP (Software Reset Command in
Progress) is set in the Status Register (RSTC_SR). It is cleared as soon as the software reset
is left. No other software reset can be performed while the SRCMP bit is set, and writing any
value in RSTC_CR has no effect.
proc_nreset
(nrst_out)
RSTTYP
NRST
SLCK
PROCRST: Writing PROCRST at 1 resets the processor and the watchdog timer.
PERRST: Writing PERRST at 1 resets all the embedded peripherals, including the
memory system, and, in particular, the Remap Command. The Peripheral Reset is
generally used for debug purposes.
EXTRST: Writing EXTRST at 1 asserts low the NRST pin during a time defined by the
field ERSTL in the Mode Register (RSTC_MR).
MCK
Freq.
Any
Any
Resynch.
1 cycle
Processor Startup
XXX
= 3 cycles
EXTERNAL RESET LENGTH
8 cycles (ERSTL=2)
AT91SAM7S32 Preliminary
0x3 = Software Reset
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