AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 438
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AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
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viii
AT91SAM7S32 Preliminary
Serial Peripheral Interface (SPI) ................................................................. 223
Two-wire Interface (TWI) ............................................................................. 249
Overview.......................................................................................................... 223
Block Diagram................................................................................................. 224
Application Block Diagram ............................................................................ 224
Signal Description ......................................................................................... 225
Product Dependencies................................................................................... 225
Functional Description................................................................................... 226
Serial Peripheral Interface (SPI) User Interface .......................................... 235
Overview.......................................................................................................... 249
Block Diagram................................................................................................. 249
Application Block Diagram ............................................................................ 249
Product Dependencies................................................................................... 250
Functional Description................................................................................... 251
PIO Pull Up Status Register ......................................................................... 219
PIO Peripheral A Select Register................................................................. 219
PIO Peripheral B Select Register................................................................. 220
PIO Peripheral A B Status Register ............................................................. 220
PIO Output Write Enable Register ............................................................... 221
PIO Output Write Disable Register .............................................................. 221
PIO Output Write Status Register ................................................................ 222
I/O Lines....................................................................................................... 225
Power Management ..................................................................................... 225
Interrupt........................................................................................................ 225
Modes of Operation...................................................................................... 226
Data Transfer ............................................................................................... 226
Master Mode Operations.............................................................................. 228
SPI Slave Mode ........................................................................................... 233
SPI Control Register .................................................................................... 236
SPI Mode Register ....................................................................................... 237
SPI Receive Data Register .......................................................................... 239
SPI Transmit Data Register ......................................................................... 240
SPI Status Register...................................................................................... 241
SPI Interrupt Enable Register ...................................................................... 243
SPI Interrupt Disable Register...................................................................... 244
SPI Interrupt Mask Register ......................................................................... 245
SPI Chip Select Register.............................................................................. 246
I/O Lines Description.................................................................................... 250
Power Management ..................................................................................... 250
Interrupt........................................................................................................ 250
Transfer Format ........................................................................................... 251
Modes of Operation...................................................................................... 251
Transmitting Data ......................................................................................... 251
6071A–ATARM–28-Oct-04
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