AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 56

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Functional Description
The Real-time Timer is used to count elapsed seconds. It is built around a 32-bit counter fed
by Slow Clock divided by a programmable 16-bit value. The value can be programmed in the
field RTPRES of the Real-time Mode Register (RTT_MR).
Programming RTPRES at 0x00008000 corresponds to feeding the real-time counter with a 1
32
Hz signal (if the Slow Clock is 32.768 Hz). The 32-bit counter can count up to 2
seconds,
corresponding to more than 136 years, then roll over to 0.
The Real-time Timer can also be used as a free-running timer with a lower time-base. The
best accuracy is reached by writing RTPRES at 1. In this case, the period of the signal pro-
vided to the Real-time Timer counter is 30.52 µs (when Slow Clock is 32.768 Hz) and the
maximum the Real-time Timer can cover is 131072 seconds, corresponding to more than 36
days.
The Real-time Timer value (CRTV) can be read at any time in the register RTT_VR (Real-time
Value Register). As this value can be updated asynchronously from the Master Clock, it is
advisable to read this register twice at the same value to improve accuracy of the returned
value.
The current value of the counter is compared with the value written in the alarm register
RTT_AR (Real-time Alarm Register). If the counter value matches the alarm, the bit ALMS in
RTT_SR is set. The alarm reg ister is se t to its ma ximum value, co rrespo nding to
0xFFFF_FFFF, after a reset.
The bit RTTINC in RTT_SR is set each time the Real-time Timer counter is incremented. This
bit can be used to start a periodic interrupt, the period being one second when the RTPRES is
programmed with 0x8000 and Slow Clock equal to 32.768 Hz.
Reading the RTT_SR status register resets the RTTINC and ALMS fields.
Writing the bit RTTRST in RTT_MR immediately reloads and restarts the clock divider with the
new programmed value. This also resets the 32-bit counter.
AT91SAM7S32 Preliminary
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6071A–ATARM–28-Oct-04