AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 14

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Embedded Flash
Flash Overview
Embedded Flash Controller
Lock Regions
Security Bit Feature
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AT91SAM7S32 Preliminary
The Flash of the AT91SAM7S32 is organized in 256 pages of 128 bytes. The 32,768
bytes are organized in 32-bit words.
The Flash contains a 128-byte write buffer, accessible through a 32-bit interface.
The Flash benefits from the integration of a power reset cell and from the brownout
detector. This prevents code corruption during power supply changes, even in the worst
conditions.
The Embedded Flash Controller (EFC) manages accesses performed by the masters of
the system. It enables reading the Flash and writing the write buffer. It also contains a
User Interface, mapped within the Memory Controller on the APB. The User Interface
allows:
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The Embedded Flash Controller also provides a dual 32-bit Prefetch Buffer that opti-
mizes 16-bit access to the Flash. This is particularly efficient when the processor is
running in Thumb mode.
The Embedded Flash Controller manages 8 lock bits to protect 8 regions of the flash
against inadvertent flash erasing or programming commands. The AT91SAM7S32 con-
tains 8 lock regions and each lock region contains 32 pages of 128 bytes. Each lock
region has a size of 4 Kbytes.
If a locked-regions erase or program command occurs, the command is aborted and the
EFC trigs an interrupt.
The 8 NVM bits are software programmable through the EFC User Interface. The com-
mand "Set Lock Bit" enables the protection. The command "Clear Lock Bit" unlocks the
lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The AT91SAM7S32 features a security bit, based on a specific NVM-Bit. When the
security is enabled, any access to the Flash, either through the ICE interface or through
the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of
the code programmed in the Flash.
This security bit can only be enabled, through the Command "Set Security Bit" of the
EFC User Interface. Disabling the security bit can only be achieved by asserting the
ERASE pin at 1, and after a full flash erase is performed. When the security bit is deac-
tivated, all accesses to the flash are permitted.
It is important to note that the assertion of the ERASE pin should always be longer than
50 ms.
As the ERASE pin integrates a permanent pull-down, it can be left unconnected during
normal operation. However, it is safer to connect it directly to GND for the final
application.
programming of the access parameters of the Flash (number of wait states, timings, etc.)
starting commands such as full erase, page erase, page program, NVM bit set,
NVM bit clear, etc.
getting the end status of the last command
getting error status
programming interrupts on the end of the last commands or on errors
6071A–ATARM–28-Oct-04