AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 128
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AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
- Current page: 128 of 446
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AIC Detailed
Block Diagram
I/O Line Description
Product
Dependencies
I/O Lines
Power
Management
Interrupt Sources
128
AT91SAM7S32 Preliminary
Figure 45. AIC Detailed Block Diagram
Table 45. I/O Line Description
The interrupt signals FIQ and IRQ0 to IRQn are normally multiplexed through the PIO control-
lers. Depending on the features of the PIO controller used in the product, the pins must be
programmed in accordance with their assigned interrupt function. This is not applicable when
the PIO controller used in the product is transparent on the input path.
The Advanced Interrupt Controller is continuously clocked. The Power Management Controller
has no effect on the Advanced Interrupt Controller behavior.
The assertion of the Advanced Interrupt Controller outputs, either nIRQ or nFIQ, wakes up the
ARM processor while it is in Idle Mode. The General Interrupt Mask feature enables the AIC to
wake up the processor without asserting the interrupt line of the processor, thus providing syn-
chronization of the processor on an event.
The Interrupt Source 0 is always located at FIQ. If the product does not feature an FIQ pin, the
Interrupt Source 0 cannot be used.
The Interrupt Source 1 is always located at System Interrupt. This is the result of the OR-wir-
ing of the system peripheral interrupt lines, such as the System Timer, the Real Time Clock,
the Power Management Controller and the Memory Controller. When a system interrupt
Pin Name
FIQ
IRQ0 - IRQn
IRQ0-IRQn
FIQ
Peripherals
Embedded
PIOIRQ
Controller
PIO
Pin Description
Fast Interrupt
Interrupt 0 - Interrupt n
External
Internal
Source
Source
Stage
Stage
Input
Input
Advanced Interrupt Controller
Forcing
Fast
User Interface
APB
Controller
Controller
Interrupt
Interrupt
Priority
Fast
Wake Up
Processor
Clock
Management
nFIQ
nIRQ
Controller
6071A–ATARM–28-Oct-04
Processor
Power
Type
Input
Input
ARM
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