AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 106
![no-image](/images/no-image-200.jpg)
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
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Entering
Programming
Mode
Programmer
Handshaking
Write Handshaking
Table 22. Write Handshake
106
Step
1
2
3
AT91SAM7S32 Preliminary
Programmer Action
Sets MODE and DATA signals
Clears NCMD signal
Waits for RDY low
Table 21. Command Bit Coding (Continued)
The following algorithm puts the device in Parallel Programming Mode:
•
•
•
•
Note:
An handshake is defined for read and write operations. When the device is ready to start a
new operation (RDY signal set), the programmer starts the handshake by clearing the NCMD
signal. The handshaking is achieved once NCMD signal is high and RDY is high.
For details on the write handshaking sequence, refer to Figure 38 and Table 22.
Figure 38. Parallel Programming Timing, Write Sequence
DATA[7:0]
0x0054
0x0035
0x001E
Apply GND, VDDIO, VDDCORE, VDDFLASH and VDDPLL.
Apply XIN clock within T
Wait for T
Start a read or write handshaking.
After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an
external clock ( > 32 kHz) is connected to XIN, then the device switches on the external clock.
Else, XIN input is not considered. A higher frequency on XIN speeds up the programmer
handshake.
MODE[3:0]
DATA[7:0]
NVALID
NCMD
POR_RESET
NOE
RDY
1
Symbol
SSE
GSE
GVE
Device Action
Waits for NCMD low
Latches MODE and DATA
Clears RDY signal
2
POR_RESET
3
if an external clock is available.
Command Executed
Set Security Bit
Get Security Bit
Get Version
4
5
Data I/O
Input
Input
Input
6071A–ATARM–28-Oct-04
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