AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 341
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
- Current page: 341 of 446
- Download datasheet (3Mb)
Timer/Counter (TC)
Overview
Block Diagram
Figure 148. Timer/Counter Block Diagram
6071A–ATARM–28-Oct-04
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
Timer Counter
The Timer/Counter (TC) includes three identical 16-bit Timer/Counter channels.
Each channel can be independently programmed to perform a wide range of functions includ-
ing frequency measurement, event counting, interval measurement, pulse generation, delay
timing and pulse width modulation.
Each channel has three external clock inputs, five internal clock inputs and two multi-purpose
input/output signals which can be configured by the user. Each channel drives an internal
interrupt signal which can be programmed to generate processor interrupts.
The Timer/Counter block has two global registers which act upon all three TC channels.
The Block Control Register allows the three channels to be started simultaneously with the
same instruction.
The Block Mode Register defines the external clock inputs for each channel, allowing them to
be chained.
TCLK0
TCLK1
TCLK2
TCLK0
TCLK1
TCLK2
TCLK0
TCLK1
TCLK2
TIOA1
TIOA0
TIOA0
TIOA1
TC0XC0S
TC1XC1S
TC2XC2S
XC0
XC1
XC2
XC0
XC1
XC2
XC0
XC1
XC2
Timer/Counter
Timer/Counter
Timer/Counter
Channel 0
Channel 1
Channel 2
SYNC
SYNC
SYNC
AT91SAM7S32 Preliminary
TIOA
TIOB
TIOA
TIOB
TIOA
TIOB
INT2
INT0
INT1
TIOA0
TIOB0
TIOA1
TIOB1
Advanced
Controller
Interrupt
Parallel I/O
Controller
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
341
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