HD6433682 ETC, HD6433682 Datasheet - Page 115

no-image

HD6433682

Manufacturer Part Number
HD6433682
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
Manufacturer
ETC
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6433682A45HV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6433682C74HV
Manufacturer:
HITACHI/日立
Quantity:
20 000
6.2.4
The operating frequency of subactive mode is selected from
SA0 bits in SYSCR2. After the SLEEP instruction is executed, the operating frequency changes to
the frequency which is set before the execution. When the SLEEP instruction is executed in
subactive mode, a transition to sleep mode, subsleep mode, standby mode, active mode, or
subactive mode is made, depending on the combination of SYSCR1 and SYSCR2. When the RES
pin goes low, the system clock pulse generator starts. Since system clock signals are supplied to
the entire chip as soon as the system clock pulse generator starts functioning, the RES pin must be
kept low until the pulse generator output stabilizes. After the pulse generator output has stabilized,
the CPU starts reset exception handling if the RES pin is driven high.
6.3
Operation in active mode is clocked at the frequency designated by the MA2, MA1, and MA0 bits
in SYSCR2. The operating frequency changes to the set frequency after SLEEP instruction
execution.
6.4
The CPU can execute programs in two modes: active and subactive modes. A direct transition is a
transition between these two modes without stopping program execution. A direct transition can
be made by executing a SLEEP instruction while the DTON bit in SYSCR2 is set to 1. The direct
transition also enables operating frequency modification in active or subactive mode. After the
mode transition, direct transition interrupt exception handling starts.
If the direct transition interrupt is disabled in interrupt enable register 1, a transition is made
instead to sleep or subsleep mode. Note that if a direct transition is attempted while the I bit in
CCR is set to 1, sleep or subsleep mode will be entered, and the resulting mode cannot be cleared
by means of an interrupt.
6.4.1
The time from the start of SLEEP instruction execution to the end of interrupt exception handling
(the direct transition time) is calculated by equation (1).
Direct transition time = {(number of SLEEP instruction execution states) + (number of internal
processing states)} (tcyc before transition) + (number of interrupt exception handling states)
(tsubcyc after transition)
Example
Direct transition time = (2 + 1)
(when the CPU operating clock of
Subactive Mode
Operating Frequency in Active Mode
Direct Transition
Direct Transition from Active Mode to Subactive Mode
(1)
tosc + 14
osc
w
/8 is selected)
8tw = 3tosc + 112tw
W
/2,
Rev. 3.00, 05/03, page 85 of 472
W
/4, and
W
/8 by the SA1 and

Related parts for HD6433682