HD6433682 ETC, HD6433682 Datasheet - Page 246

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

3. Setting GR Value in Complementary PWM Mode: To set GR or modify GR during operation
13.4.8
Buffer operation differs depending on whether GR has been designated for an input capture
register or an output compare register, or in reset synchronous PWM mode or complementary
PWM mode.
Table 13.8 shows the register combinations used in buffer operation.
Table 13.8 Register Combinations in Buffer Operation
1. When GR is an output compare register
Rev. 3.00, 05/03, page 216 of 472
General Register
GRA
GRB
in complementary PWM mode, refer to the following notes.
A. Initial value
B. Modifying the setting value
When a compare match occurs, the value in the buffer register of the corresponding channel is
transferred to the general register.
This operation is illustrated in figure 13.35.
Buffer register
a. H'0000 to T – 1 (T: Initial value of TCNT0) must not be set for the initial value.
b. GRA_0 – (T – 1) or more must not be set for the initial value.
c. When using buffer operation, the same values must be set in the buffer registers and
Use buffer operation. When GR is written to directly, a correct waveform may not be
output. Do not change settings of GRA_0 during operation.
Buffer Operation
corresponding general registers.
Figure 13.35 Compare Match Buffer Operation
Buffer Register
GRC
GRD
Compare match signal
register
Buffer
Comparator
TCNT