HD6433682 ETC, HD6433682 Datasheet - Page 221

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

13.4
13.4.1
When one of bits STR0 and STR1 in TSTR is set to 1, the TCNT counter for the corresponding
channel begins counting. TCNT can operate as a free-running counter, periodic counter, for
example. Figure 13.7 shows an example of the counter operation setting procedure.
1. Free-running count operation and periodic count operation
Select output compare register
Select counter clearing source
Immediately after a reset, the TCNT counters for channels 0 and 1 are all designated as free-
running counters. When the relevant bit in TSTR is set to 1, the corresponding TCNT counter
starts an increment operation as a free-running counter. When TCNT overflows, the OVF flag
in TSR is set to 1. If the value of the OVIE bit in the corresponding TIER is 1 at this point,
timer Z requests an interrupt. After overflow, TCNT starts an increment operation again from
H'0000.
Figure 13.8 illustrates free-running counter operation.
Start count operation
Select counter clock
Operation selection
Periodic counter
Counter Operation
Operation
Set period
Figure 13.7 Example of Counter Operation Setting Procedure
[1]
[4]
[2]
[3]
[5]
Free-running counter
Rev. 3.00, 05/03, page 191 of 472
[1] Select the counter
[2] For periodic counter
[3] Designate the general
[4] Set the periodic counter
[5] Set the STR bit in TSTR
clock with bits
TPSC2 to TPSC0 in
TCR. When an external
clock is selected, select
the external clock edge
with bits CKEG1
and CKEG0 in TCR.
operation, select the
TCNT clearing
source with bits
CCLR2 to CCLR0 in
TCR.
register selected in [2]
as an output compare
register by means of
TIOR.
cycle in the general
register selected
in [2].
to 1 to start the counter
operation.