HD6433682 ETC, HD6433682 Datasheet - Page 263

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

7. Contention between GR Write and Input Capture: If an input capture signal is generated in the
8. Notes on Setting Reset Synchronous PWM Mode/Complementary PWM Mode: When bits
WGR
(internal write signal)
T
performed. Figure 13.58 shows the timing in this case.
CMD1 and CMD0 in TFCR are set, note the following:
A. Write bits CMD1 and CMD0 while TCNT_1 and TCNT_0 are halted.
B. Changing the settings of reset synchronous PWM mode to complementary PWM mode or
2
Address bus
Input capture
signal
state of a GR write cycle, the input capture operation has priority and the write to GR is not
TCNT
GR
vice versa is disabled. Set reset synchronous PWM mode or complementary PWM mode
after the normal operation (bits CMD1 and CMD0 are cleared to 0) has been set.
Figure 13.58 Contention between GR Write and Input Capture
N
GR write cycle
T
GR address
1
T
2
M
Rev. 3.00, 05/03, page 233 of 472
GR write data