HD6433682 ETC, HD6433682 Datasheet - Page 122

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HD6433682

Manufacturer Part Number
HD6433682
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
Manufacturer
ETC
Datasheet

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7.2.4
FLPWCR enables or disables a transition to the flash memory power-down mode when the LSI
switches to subactive mode. There are two modes: mode in which operation of the power supply
circuit of flash memory is partly halted in power-down mode and flash memory can be read, and
mode in which even if a transition is made to subactive mode, operation of the power supply
circuit of flash memory is retained and flash memory can be read.
7.2.5
Bit 7 (FLSHE) in FENR enables or disables the CPU access to the flash memory control registers,
FLMCR1, FLMCR2, EBR1, and FLPWCR.
Rev. 3.00, 05/03, page 92 of 472
Bit
7
6 to 0
Bit
7
6 to 0
Bit Name
PDWND
Bit Name
FLSHE
Flash Memory Power Control Register (FLPWCR)
Flash Memory Enable Register (FENR)
Initial
Value
0
All 0
Initial
Value
0
All 0
R/W
R/W
R/W
R/W
Description
Power-Down Disable
When this bit is 0 and a transition is made to subactive
mode, the flash memory enters the power-down mode.
When this bit is 1, the flash memory remains in the
normal mode even after a transition is made to subactive
mode.
Reserved
These bits are always read as 0.
Description
Flash Memory Control Register Enable
Flash memory control registers can be accessed when
this bit is set to 1. Flash memory control registers cannot
be accessed when this bit is set to 0.
Reserved
These bits are always read as 0.

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