HD6433682 ETC, HD6433682 Datasheet - Page 240

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HD6433682

Manufacturer Part Number
HD6433682
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
Manufacturer
ETC
Datasheet

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13.4.7
Three PWM waveforms for non-overlapped normal and counter phases are output by combining
channels 0 and 1.
In complementary PWM mode, the FTIOB0 to FTIOD0 and FTIOA1 to FTIOD1 pins become
PWM-output pins automatically. TCNT_0 and TCNT_1 perform an increment or decrement
operation. Tables 13.6 and 13.7 show the output pins and register settings in complementary PWM
mode, respectively.
Figure 13.29 shows the example of complementary PWM mode setting procedure.
Table 13.6 Output Pins in Complementary PWM Mode
Table 13.7 Register Settings in Complementary PWM Mode
Rev. 3.00, 05/03, page 210 of 472
Channel
0
0
0
1
1
1
1
Register
TCNT_0
TCNT_1
GRA_0
GRB_0
GRA_1
GRB_1
Complementary PWM Mode
Pin Name
FTIOC0
FTIOB0
FTIOD0
FTIOA1
FTIOC1
FTIOB1
FTIOD1
Description
Initial setting of non-overlapped periods (non-overlapped periods are differences
with TCNT_1)
Initial setting of H'0000
Sets (upper limit value – 1) of TCNT_0
Set a changing point of the PWM waveform output from pins FTIOB0 and
FTIOD0.
Set a changing point of the PWM waveform output from pins FTIOA1 and
FTIOC1.
Set a changing point of the PWM waveform output from pins FTIOB1 and
FTIOD1.
Input/Output
Output
Output
Output
Output
Output
Output
Output
Pin Function
Toggle output in synchronous with PWM cycle
PWM output 1
PWM output 1 (counter-phase waveform non-
overlapped with PWM output 1)
PWM output 2
PWM output 2 (counter-phase waveform non-
overlapped with PWM output 2)
PWM output 3
PWM output 3 (counter-phase waveform non-
overlapped with PWM output 3)

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