HD6433682 ETC, HD6433682 Datasheet - Page 229

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

13.4.4
In synchronous operation, the values in a number of TCNT counters can be rewritten
simultaneously (synchronous presetting). Also, a number of TCNT counters can be cleared
simultaneously by making the appropriate setting in TCR (synchronous clearing). Synchronous
operation enables GR to be increased with respect to a single time base.
Figure 13.19 shows an example of the synchronous operation setting procedure.
Figure 13.20 shows an example of synchronous operation. In this example, synchronous operation
has been selected, FTIOB0 and FTIOB1 have been designated for PWM mode, GRA_0 compare
match has been set as the channel 0 counter clearing source, and synchronous clearing has been set
for the channel 1 counter clearing source. Two-phase PWM waveforms are output from pins
FTIOB0 and FTIOB1. At this time, synchronous presetting and synchronous operation by GRA_0
compare match are performed by TCNT counters.
<Synchronous presetting>
[1] Set the SYNC bits in TMDR to 1.
[2] When a value is written to either of the TCNT counters, the same value is simultaneously written to the
[3] Set bits CCLR1 and CCLR0 in TCR to specify counter clearing by compare match/input capture.
[4] Set bits CCLR1 and CCLR0 in TCR to designate synchronous clearing for the counter clearing source.
[5] Set the STR bit in TSTR to 1 to start the count operation.
Synchronous presetting
Synchronous operation
Set synchronous
other TCNT counter.
Set TCNT
operation
selection
Synchronous Operation
Figure 13.19 Example of Synchronous Operation Setting Procedure
[1]
[2]
Start counter operation
Synchronous clearing
<Counter clearing>
source generation
clearing source
Select counter
channel?
Clearing
Yes
No
[3]
[5]
Rev. 3.00, 05/03, page 199 of 472
<Synchronous clearing>
Start counter operation
clearing source
Select counter
[4]
[5]