HD6433682 ETC, HD6433682 Datasheet - Page 241

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

Figure 13.29 Example of Complementary PWM Mode Setting Procedure
<Complementary PWM mode>
Note: To re-enter complementary PWM mode after it has been
Complementary PWM mode
Enable waveform output
Stop counter operation
Start counter operation
Select counter clock
Initialize output pin
Set complementary
Initialize output pin
cancelled during operation, repeat the setting procedures from [1].
PWM mode
Set TCNT
Set GR
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[1] Clear bits STR0 and STR1 in TSTR to 0,
[2] Write H'00 to TOCR.
[3] Use bits TPSC2 to TPSC0 in TCR to
[4] Use bits CMD1 and CMD0 in TFCR to set
[5] Set H'00 to TOCR.
[6] TCNT_1 must be H'0000. Set a non-
[7] GRA_0 is a cycle register. Set the cycle to
[8] Use TOER to enable or disable the timer
[9] Set the STR0 and STR1 bits in TSTR to 1
and stop the counter operation of
TCNT_0. Stop TCNT_0 and TCNT_1 and
set complementary PWM mode.
select the same counter clock for channels
0 and 1. When an external clock is
selected, select the edge of the external
clock by bits CKEG1 and CKEG0 in TCR.
Do not use bits CCLR1 and CCLR0 in
TCR to clear the counter.
complementary PWM mode. FTIOB0 to
FTIOD0 and FTIOA1 to FTIOD1
automatically become PWM output pins.
overlapped period to TCNT_0.
GRA_0. Set the timing to change the
PWM output waveform to GRB_0, GRA_1,
and GRB_1. Note that the timing must be
set within the range of compare match
carried out for TCNT_0 and TCNT_1.
T
and GRB_1)
output.
to start the count operation.
X (X: Initial value of GRB_0, GRA_1,
Rev. 3.00, 05/03, page 211 of 472