HD6433682 ETC, HD6433682 Datasheet - Page 129

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

Table 7.4
Program Data
0
0
1
1
Table 7.5
Reprogram Data
0
0
1
1
Table 7.6
n
(Number of Writes)
1 to 6
7 to 1,000
Note: Time shown in s.
7.4.2
When erasing flash memory, the erase/erase-verify flowchart shown in figure 7.4 should be
followed.
1. Prewriting (setting erase block data to all 0s) is not necessary.
2. Erasing is performed in block units. Make only a single-bit specification in the erase block
3. The time during which the E bit is set to 1 is the flash memory erase time.
4. The watchdog timer (WDT) is set to prevent overerasing due to program runaway, etc. An
5. For a dummy write to a verify address, write 1-byte data H'FF to an address whose lower two
register (EBR1). To erase multiple blocks, each block must be erased in turn.
overflow cycle of approximately 19.8 ms is allowed.
bits are B'00. Verify data can be read in longwords from the address to which a dummy write
was performed.
Erase/Erase-Verify
Reprogram Data Computation Table
Additional-Program Data Computation Table
Programming Time
Verify Data
0
1
0
1
Verify Data
0
1
0
1
Programming
Time
30
200
Reprogram Data
1
0
1
1
Additional-Program
Data
0
1
1
1
In Additional
Programming
10
Rev.3.00, 05/03, page 99 of 472
Comments
Programming completed
Reprogram bit
Remains in erased state
Comments
Additional-program bit
No additional programming
No additional programming
No additional programming
Comments