HD6433682 ETC, HD6433682 Datasheet - Page 265
HD6433682
Manufacturer Part Number
HD6433682
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
Manufacturer
ETC
Datasheet
1.HD6433682.pdf
(504 pages)
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The watchdog timer is an 8-bit timer that can generate an internal reset signal for this LSI if a
system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow.
The block diagram of the watchdog timer is shown in figure 14.1.
14.1
14.2
The watchdog timer has the following registers.
WDT0110A_000020020200
Selectable from nine counter input clocks.
Eight clock sources ( /64, /128, /256, /512, /1024, /2048, /4096, and /8192) or the
internal oscillator can be selected as the timer-counter clock. When the internal oscillator is
selected, it can operate as the watchdog timer in any operating mode.
Reset signal generated on counter overflow
An overflow period of 1 to 256 times the selected clock can be set.
Timer control/status register WD (TCSRWD)
Timer counter WD (TCWD)
Timer mode register WD (TMWD)
Features
Register Descriptions
Legend:
TCSRWD: Timer control/status register WD
TCWD:
PSS:
TMWD:
oscillator
Internal
ø
Timer counter WD
Prescaler S
Timer mode register WD
Figure 14.1 Block Diagram of Watchdog Timer
Section 14 Watchdog Timer
CLK
PSS
TCSRWD
TMWD
TCWD
Rev. 3.00, 05/03, page 235 of 472
Internal reset
signal
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