HD6433682 ETC, HD6433682 Datasheet - Page 315

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

The I
interface functions. The register configuration that controls the I
Philips configuration, however.
Figure 17.1 shows a block diagram of the I
Figure 17.2 shows an example of I/O pin connections to external circuits.
17.1
I
Clocked synchronous format
IFIIC10A_000020020200
2
C bus format
Selection of I
Continuous transmission/reception
Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
Start and stop conditions generated automatically in master mode
Selection of acknowledge output levels when receiving
Automatic loading of acknowledge bit when transmitting
Bit synchronization/wait function
In master mode, the state of SCL is monitored per bit, and the timing is synchronized
automatically.
If transmission/reception is not yet possible, set the SCL to low until preparations are
completed.
Six interrupt sources
Transmit data empty (including slave-address match), transmit end, receive data full (including
slave-address match), arbitration lost, NACK detection, and stop condition detection
Direct bus drive
Two pins, SCL and SDA pins, function as NMOS open-drain outputs when the bus drive
function is selected.
Four interrupt sources
Transmit-data-empty, transmit-end, receive-data-full, and overrun error
2
C bus interface 2 conforms to and provides a subset of the Philips I
Features
2
C format or clocked synchronous serial format
Section 17 I
2
C Bus Interface 2 (IIC2)
2
C bus interface 2.
2
Rev. 3.00, 05/03, page 285 of 472
C bus differs partly from the
2
C bus (inter-IC bus)