HD6433682 ETC, HD6433682 Datasheet - Page 211

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HD6433682

Manufacturer Part Number
HD6433682
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
Manufacturer
ETC
Datasheet

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13.3.6
TOCR selects the initial outputs before the first occurrence of a compare match. Note that bits
OLS1 and OLS0 in TFCR set these initial outputs in reset synchronous PWM mode and
complementary PWM mode.
Bit
2
1
0
Bit
7
6
5
Bit Name
EC0
EB0
EA0
Bit Name
TOD1
TOC1
TOB1
Timer Output Control Register (TOCR)
Initial
Value
1
Initial
Value
0
0
0
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Master Enable C0
0: FTIOC0 pin output is enabled according to the TPMR,
1: FTIOC0 pin output is disabled regardless of the TPMR,
Master Enable B0
0: FTIOB0 pin output is enabled according to the TPMR,
1: FTIOB0 pin output is disabled regardless of the TPMR,
Master Enable A0
0: FTIOA0 pin output is enabled according to the TPMR,
1: FTIOA0 pin output is disabled regardless of the TPMR,
Description
Output Level Select D1
0: 0 output at the FTIOD1 pin*
1: 1 output at the FTIOD1 pin*
Output Level Select C1
0: 0 output at the FTIOC1 pin*
1: 1 output at the FTIOC1 pin*
Output Level Select B1
0: 0 output at the FTIOB1 pin*
1: 1 output at the FTIOB1 pin*
TFCR, and TIORC_0 settings
TFCR, and TIORC_0 settings (FTIOC0 pin is operated
as an I/O port).
TFCR, and TIORA_0 settings
TFCR, and TIORA_0 settings (FTIOB0 pin is operated
as an I/O port).
TFCR, and TIORA_0 settings
TFCR, and TIORA_0 settings (FTIOA0 pin is operated
as an I/O port).
Rev. 3.00, 05/03, page 181 of 472

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