HD6433682 ETC, HD6433682 Datasheet - Page 455

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

A.3
The status of execution for each instruction of the H8/300H CPU and the method of calculating
the number of states required for instruction execution are shown below. Table A.4 shows the
number of cycles of each type occurring in each instruction, such as instruction fetch and data
read/write. Table A.3 shows the number of states required for each cycle. The total number of
states required for execution of an instruction can be calculated by the following expression:
Examples: When instruction is fetched from on-chip ROM, and an on-chip RAM is accessed.
From table A.4:
From table A.3:
Number of states required for execution = 2
When instruction is fetched from on-chip ROM, branch address is read from on-chip ROM, and
on-chip RAM is used for stack area.
From table A.4:
From table A.3:
Number of states required for execution = 2
BSET #0, @FF00
I = L = 2,
S
JSR @@ 30
I = 2,
S
I
I
= 2,
= S
Execution states = I
Number of Execution States
J
= S
J = K = 1,
S
K
L
= 2
= 2
J = K = M = N= 0
L = M = N = 0
S
I
+ J
S
J
+ K
2 + 2
2 + 1
S
K
+ L
2 = 8
2+ 1
S
L
+ M
2 = 8
Rev. 3.00, 05/03, page 425 of 472
S
M
+ N
S
N