HD6433682 ETC, HD6433682 Datasheet - Page 268

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

14.3
The watchdog timer is provided with an 8-bit counter. If 1 is written to WDON while writing 0 to
B2WI when the TCSRWE bit in TCSRWD is set to 1, TCWD begins counting up. (To operate
the watchdog timer, two write accesses to TCSRWD are required.) When a clock pulse is input
after the TCWD count value has reached H'FF, the watchdog timer overflows and an internal reset
signal is generated. The internal reset signal is output for a period of 512
TCWD is a writable counter, and when a value is set in TCWD, the count-up starts from that
value. An overflow period in the range of 1 to 256 input clock cycles can therefore be set,
according to the TCWD set value.
Figure 14.2 shows an example of watchdog timer operation.
Rev. 3.00, 05/03, page 238 of 472
Example:
Operation
Internal reset
signal
count value
TCWD
With 30ms overflow period when
Therefore, 256 – 15 = 241 (H'F1) is set in TCW.
H'FF
H'00
4
8192
10
H'F1
Figure 14.2 Watchdog Timer Operation Example
6
H'F1 written
to TCWD
30
10
–3
Start
= 14.6
H'F1 written to TCWD
= 4 MHz
512
Reset generated
osc
TCWD overflow
clock cycles
osc
clock cycles.