HD6433682 ETC, HD6433682 Datasheet - Page 365

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

2. Page Write
SCL
SDA
Legend:
SDA
SCL
Legend: R/ : R/
This LSI is capable of the page write operation which allows any number of bytes up to 8 bytes
to be written in a single write cycle. The write data is input in the same sequence as the byte
write in the order of a start condition, slave address + R/W code, memory address (n), and
write data (Dn) with every ninth bit acknowledgement "0" output. The EEPROM enters the
page write operation if the EEPROM receives more write data (Dn+1) is input instead of
receiving a stop condition after receiving the write data (Dn). LSB 3 bits (A2 to A0) in the
EEPROM address are automatically incremented to be the (n+1) address upon receiving write
data (Dn+1). Thus the write data can be received sequentially.
Addresses in the page are incremented at each receipt of the write data and the write data can
be input up to 8 bytes. If the LSB 3 bits (A2 to A0) in the EEPROM address reach the last
address of the page, the address will roll over to the first address of the same page. When the
address is rolled over, write data is received twice or more to the same address, however, the
last received data is valid. At the receipt of the stop condition, write data reception is
terminated and the write operation is entered.
The page write operation is shown in figure 19.4.
condition
Start
R/ : R/
ACK: acknowledge
condition
ACK: acknowledge
Start
1
code (0 is for a write and 1 is for a read),
1
2
code (0 is for a write and 1 is for a read)
Slave address
3
2
4
3
Slave address
5
4
6
5
7
R/
Figure 19.4 Page Write Operation
Figure 19.3 Byte Write Operation
8
6
ACK
9
7
Upper memory
A15
1
R/
address
8
ACK
9
A8
8
ACK
A15
9
1
Upper memory
A7
address
lower memory
1
address
A8
8
A0
8
ACK
ACK
9
9
A7
D7
1
Write Data
1
lower memory
address
Rev. 3.00, 05/03, page 335 of 472
D0
8
A0
8
ACK
9
ACK
9
D7
1
Write Data
Write Data
D0
8
ACK
9
ACK
conditon
Stop
conditon
Stop