HD6433682 ETC, HD6433682 Datasheet - Page 16

• Manufacturer Part Number: HD6433682
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
• Manufacturer: ETC

17.5 Interrupt Request............................................................................................................... 315
17.6 Bit Synchronous Circuit.................................................................................................... 316
Section 18 A/D Converter .................................................................................317
18.1 Features ............................................................................................................................. 317
18.2 Input/Output Pins .............................................................................................................. 319
18.3 Register Descriptions ........................................................................................................ 320
18.4 Operation .......................................................................................................................... 323
18.5 A/D Conversion Accuracy Definitions ............................................................................. 326
18.6 Usage Notes ...................................................................................................................... 327
Section 19 EEPROM .........................................................................................329
19.1 Features ............................................................................................................................. 329
19.2 Input/Output Pins .............................................................................................................. 331
19.3 Register Description.......................................................................................................... 331
19.4 Operation .......................................................................................................................... 332
19.5 Usage Notes ...................................................................................................................... 339
Rev. 3.00, 05/03, page xvi of xxx
17.4.3 Master Receive Operation.................................................................................... 302
17.4.4 Slave Transmit Operation .................................................................................... 304
17.4.5 Slave Receive Operation...................................................................................... 306
17.4.6 Clocked Synchronous Serial Format.................................................................... 308
17.4.7 Noise Canceler ..................................................................................................... 310
17.4.8 Example of Use.................................................................................................... 311
18.3.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 320
18.3.2 A/D Control/Status Register (ADCSR) ............................................................... 321
18.3.3 A/D Control Register (ADCR) ............................................................................ 322
18.4.1 Single Mode......................................................................................................... 323
18.4.2 Scan Mode ........................................................................................................... 323
18.4.3 Input Sampling and A/D Conversion Time ......................................................... 324
18.4.4 External Trigger Input Timing............................................................................. 325
18.6.1 Permissible Signal Source Impedance ................................................................. 327
18.6.2 Influences on Absolute Accuracy ........................................................................ 327
19.3.1 EEPROM Key Register (EKR)............................................................................ 331
19.4.1 EEPROM Interface .............................................................................................. 332
19.4.2 Bus Format and Timing ....................................................................................... 332
19.4.3 Start Condition..................................................................................................... 332
19.4.4 Stop Condition ..................................................................................................... 333
19.4.5 Acknowledge ....................................................................................................... 333
19.4.6 Slave Addressing ................................................................................................. 333
19.4.7 Write Operations.................................................................................................. 334
19.4.8 Acknowledge Polling........................................................................................... 336
19.4.9 Read Operation .................................................................................................... 336
19.5.1 Data Protection at V
CC
On/Off............................................................................. 339